IEEE/ANSI standard 1149.1 --1990, also known as JTAG and Boundary Scan, is a standard for testing integrated circuits as well as circuit boards. In the prior art, printed circuit boards were tested by automatic test equipment (ATE) which contacted special locations on a board by means of probe wires attached to a probe card. The probe card interfaced with the ATE in a manner such that test signals could be sent to and from the ATE to specific areas of a board under test. On the other hand, Boundary Scan requires that certain registers and dedicated pins be placed on a chip so that software can be used to implement test procedures, rather than ATE. Relatively inexpensive computers can now be used to test integrated circuit chips even after the chip is manufactured and shipped. Five dedicated pins provided on chips with a Boundary Scan test capability communicate with a Test Access Port (TAP) which gives access to logic which executes Boundary Scan and other test procedures. The pins are Test Data In (TDI), Test Data Out (TDO), Test Clock (TCK), Test Mode Select (TMS) and Test Reset (TRST).
Three of the five dedicated pins, namely TMS, TCK and TRST, access a simple state machine, with 16 states, known as the TAP Controller. In turn, the TAP Controller, together with dedicated pins TDI and TDO communicate with an Instruction Register, as well as with two other registers which are mandatory in any Boundary Scan implementation. These are the Boundary Scan Register and the Bypass Register. The Instruction Register, in turn, communicates with other registers, known generally as Data Registers, some of which may be user-defined. The Data Registers allow for device configuration, verification, test, reliability evaluation and so on. One further important feature of Boundary Scan architecture is a set of test cells, one cell being associated with each of the functional input/output pins of the integrated circuit so that a cell may be used as an input or output cell for the device. The cells are arranged in a shift-register organization for serial communication between the TDI and TDO pins.
In the book "The Boundary-Scan Handbook" by K. P. Parker, the author states on p. 46 "User-defined instructions may target standard registers (such as the Boundary Register), portions of standard registers, or concatenations of registers between TDI and TDO. Alternatively, new user-defined registers may be targeted". An object of the invention was to devise user-defined registers which expand the usefulness of Boundary Scan testing and to make the User-defined registers readily accessible to software.